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| 28LV011 3.3V 1 Megabit (128K x 8-Bit) EEPROM VCC VSS RES OE CE WE RES I/O Buffer and Input Latch Control Logic Timing High Voltage Generator I/O0 I/O7 RDY/Busy 28LV011 A0 A6 Address Buffer and Latch A7 A16 Y Decoder Y Gating X Decoder Memory Array Data Latch Logic Diagram Memory FEATURES: * 3.3V low voltage operation 128K x 8 Bit EEPROM * RAD-PAK(R) radiation-hardened against natural space radiation * Total dose hardness: - > 100 krad (Si), depending upon space mission * Excellent Single Event Effects: - SELTH > 84 MeV/mg/cm2 - SEUTH > 37 Mev/mg/cm2 (read mode) - SEU saturated cross section = 3E-6 cm2 (read mode) - SEUTH = 11.4 Mev/mg/cm2 (write mode) - SEU saturated cross section = 5E-3 cm2 (write mode) with hard errors * Package: - 32 Pin RAD-PAK(R) flat pack - 32 Pin RAD-PAK(R) DIP - JEDEC-approved byte-wide pinout * Address Access Time: - 200, 250 ns Access times available * High endurance: - 10,000 erase/write (in Page Mode), 10-year data retention * Page write mode: - 1 to 128 bytes * Automatic programming - 15 ms automatic page/byte write * Low power dissipation - 20 mW/MHz active current (typ.) - 72 W standby (maximum) DESCRIPTION: Maxwell Technologies' 28LV011 high density, 3.3V, 1 Megabit EEPROM microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 28LV011 is capable of in-system electrical Byte and Page programmability. It has a 128-Byte Page Programming function to make its erase and write operations faster. It also features Data Polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 28LV011, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Meanwhile, software data protection is implemented using the JEDEC-optional Standard algorithm. The 28LV011 is designed for high reliability in the most demanding space applications. Maxwell Technologies' patented RAD-PAK(R) packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK(R) provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S. Note:The recommended form of data protection during power on/off is to hold the RES pin to VSS during power up and power down. This may be accompanied by connecting the RES pin to the CPU reset line. Failure to provide adequate protection during power on/off may result in lost or modified data. 05.28.02 Rev 2 All data sheets are subject to change without notice 1 (858) 503-3300 - Fax: (858) 503-3301- www.maxwell.com (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM TABLE 1. 28LV011A PINOUT DESCRIPTION PIN SYMBOL DESCRIPTION Address Input/Output Output Enable Chip Enable Write Enable Power Supply Ground Ready/Busy Reset 12-5, 27, 26, 23, 25, A0-A16 4, 28, 3, 31, 2 13-15, 17-21 24 22 29 32 16 1 30 I/O0 - I/O7 OE CE WE VCC VSS RDY/BUSY RES 28LV011 Memory TABLE 2. 28LV011 ABSOLUTE MAXIMUM RATINGS PARAMETER Supply Voltage (Relative to Vss) Input Voltage (Relative to Vss) Operating Temperature Range Storage Temperature Range 1. VIN min = -3.0 V for pulse width < 50 ns. SYMBOL VCC VIN TOPR TSTG MIN -0.6 -0.5 -55 -65 1 MAX 7.0 7.0 125 150 UNIT V V C C TABLE 3. DELTA LIMITS PARAMETER ICC1 ICC2 ICC3A ICC3B VARIATION 10% 10% 10% 10% 05.28.02 Rev 2 All data sheets are subject to change without notice 2 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM TABLE 4. 28LV011 RECOMMENDED OPERATING CONDITIONS PARAMETER Supply Voltage Input Voltage RES_PIN Operating Temperature Range 1. VIL min = -1.0 V for pulse width < 50 ns. 2. VIH min = 2.2 V for VCC = 3.6 V. SYMBOL VCC VIL VIH VH TOPR MIN 3.0 -0.3 2.0 2 VCC-0.5 -55 1 28LV011 MAX 3.6 0.8 VCC+0.3 VCC +1 +125 UNIT V V C TABLE 5. 28LV011 CAPACITANCE (TA = 25C, F = 1MHZ) PARAMETER Input Capacitance: VIN = 0V 1 Output Capacitance: VOUT = 0V 1 1. Guaranteed by design. SYMBOL CIN COUT MIN --MAX 6 12 UNIT Memory pF pF TABLE 6. 28LV011 DC ELECTRICAL CHARACTERISTICS (VCC = 3.3V 0.3, TA = -55 TO +125C UNLESS OTHERWISE SPECIFIED) PARAMETER Input Leakage Current Output Leakage Current Standby VCC Current Operating VCC Current TEST CONDITIONS VCC = 3.6V, VIN = 3.6V VCC = 3.6V, VOUT = 3.6V/0.4V CE = VCC CE = VIH IOUT = 0mA, Duty = 100%, Cycle = 1 s @ VCC = 3.3V IOUT = 0mA, Duty = 100%, Cycle = 250 ns @ VCC = 3.3V SUBGROUPS SYMBOL 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 ILI ILO ICC1 ICC2 ICC3 MIN ------1, 2, 3 VIL VIH VH VOL VOH -2.01 VCC-0.5 -VCCx0.8 MAX 2 2 20 1 6 15 0.8 --0.4 -V UNIT A A A mA mA Input Voltage Output Voltage IOL = 2.1 mA IOH = -400 A 1, 2, 3 V 1. VIH min = 2.2V for VCC = 3.6V. 05.28.02 Rev 2 All data sheets are subject to change without notice 3 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM TABLE 7. 28LV011 AC CHARACTERISTICS FOR READ OPERATION1 (VCC = 3.3V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Functional Test Address Access Time -200 -250 Chip Enable Access Time -200 -250 Output Enable Access Time -200 -250 Output Hold to Address Change -200 -250 Output Disable to High-Z2 -200 -250 Output Disable to High-Z -200 -250 RES to Output Delay 3 -200 -250 TEST CONDITIONS Verify Truth Table CE = OE = VIL, WE = VIH SUBGROUPS 7, 8A, 8B 9, 10, 11 SYMBOL All tACC --OE = VIL, WE = VIH 9, 10, 11 tCE --CE = VIL, WE = VIH 9, 10, 11 tOE 0 0 CE = OE = VIL, WE = VIH 9, 10, 11 tOH 0 0 CE = VIL, WE = VIH CE = OE = VIL, WE = VIH CE = VIL, WE = VIH CE = OE = VIL, WE = VIH CE = OE = VIL WE = VIH 9, 10, 11 tDF 0 0 9, 10, 11 tDFR 0 0 9, 10, 11 tRR 0 0 MIN 28LV011 MAX UNIT ns 200 250 ns 200 250 ns 110 120 ns --ns 50 50 ns 300 350 ns 525 550 Memory 1. Test conditions: Input pulse levels - 0.4V to 2.4V; input rise and fall times < 20 ns; output load - 1 TTL gate + 100 pF (including scope and jig); reference levels for measuring timing - 0.8V/1.8V. 2. tDF and tDFR is defined as the time at which the output becomes an open circuit and data is no longer driven. 3. Guaranteed by design. 05.28.02 Rev 2 All data sheets are subject to change without notice 4 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM 28LV011 TABLE 8. 28LV011 AC ELECTRICAL CHARACTERISTICS FOR ERASE AND WRITE OPERATIONS (VCC = 3.3V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Address Setup Time -200 -250 Chip Enable to Write Setup Time (WE controlled) -200 -250 Write Pulse Width (CE controlled) -200 -250 Write Pulse Width (WE controlled) -200 -250 Address Hold Time -200 -250 Data Setup Time -200 -250 Data Hold Time -200 -250 Chip Enable Hold Time (WE controlled) -200 -250 Write Enable to Write Setup Time (CE controlled) -200 -250 Write Enable Hold Time (CE controlled) -200 -250 Output Enable to Write Setup Tim -200 -250 Output Enable Hold Time -200 -250 Write Cycle Time 1,2 -200 -250 SUBGROUPS 9, 10, 11 SYMBOL tAS 0 0 9, 10, 11 tCS 0 0 9, 10, 11 tCW 200 250 9, 10, 11 tWP 200 250 9, 10, 11 tAH 125 150 9, 10, 11 tDS 100 100 9, 10, 11 tDH 10 10 9, 10, 11 tCH 0 0 9, 10, 11 tWS 0 0 9, 10, 11 tWH 0 0 9, 10, 11 tOES 0 0 9, 10, 11 tOEH 0 0 9, 10, 11 tWC --15 15 --ms --ns --ns --ns --ns --ns --ns --ns --ns --ns --ns --ns MIN MAX UNIT ns Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 5 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM (VCC = 3.3V 10%, TA = -55 TO +125 C UNLESS OTHERWISE SPECIFIED) PARAMETER Byte Load Cycle -200 -250 Data Latch Time2 -200 -250 Byte Load Window 2 -200 -250 Time to Device Busy -200 -250 Write Start Time -200 -250 RES to Write Setup Time2 -200 -250 VCC to RES Setup Time 2 -200 -250 SUBGROUPS 9, 10, 11 SYMBOL tBLC 1 1 9, 10, 11 tDL 700 750 9, 10, 11 tBL 100 100 9, 10, 11 tDB 100 120 9, 10, 11 tDW 250 250 9, 10, 11 tRP 100 100 9, 10, 11 tRES 1 1 MIN 28LV011 MAX 30 30 ns --s --ns --ns --s --s --UNIT s TABLE 8. 28LV011 AC ELECTRICAL CHARACTERISTICS FOR ERASE AND WRITE OPERATIONS Memory 1. tWC must be longer than this value unless polling techniques or RDY/BSY are used. This device automatically completes the internal write operation within this value. 2. Guaranteed by design. TABLE 9. 28LV011 MODE SELECTION1,2 MODE Read Standby Write Deselect Write Inhibit Data Polling Program 1. X = Don't care. 2. Refer to the recommended DC operating conditions. 05.28.02 Rev 2 CE VIL VIH VIL VIL X X VIL X OE VIL X VIH VIH X VIL VIL X WE VIH X VIL VIH VIH X VIH X RES VH X VH VH X X VH VIL RDY/BUSY High-Z High-Z High-Z --> VOL High-Z --VOL High-Z I/O DOUT High-Z DIN High-Z --Data Out (I/O7) High-Z All data sheets are subject to change without notice 6 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM FIGURE 1. READ TIMING WAVEFORM 28LV011 Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 7 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM FIGURE 2. BYTE WRITE TIMING WAVEFORM(1) (WE CONTROLLED) 28LV011 Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 8 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) 28LV011 Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 9 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM FIGURE 4. PAGE WRITE TIMING WAVEFORM(1) (WE CONTROLLED) 28LV011 Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 10 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM FIGURE 5. PAGE WRITE TIMING WAVEFORM(2) (CE CONTROLLED) 28LV011 Memory FIGURE 6. SOFTWARE DATA PROTECTION TIMING WAVEFORM(1) (IN PROTECTION MODE) 05.28.02 Rev 2 All data sheets are subject to change without notice 11 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM 28LV011 FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM(2) (IN NON-PROTECTION MODE) FIGURE 8. DATA POLLING TIMING WAVEFORM Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 12 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM FIGURE 9. TOGGLE BIT WAVEFORM 28LV011 FIGURE 10. SEU SATURATED CROSS SECTION VALUES IN READ MODE 28LV010 Read Mode Cross-section 1.00E-02 Memory 1.00E-03 lv1 Cross-section [cm^2] 1.00E-04 lv2 lv5 lv6 1.00E-05 1.00E-06 1.00E-07 0 10 20 30 40 50 60 70 80 90 LET [Mev-cm^2/mg] 05.28.02 Rev 2 All data sheets are subject to change without notice 13 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM 28LV011 FIGURE 11. SEU SATURATED CROSS SECTION VALUES IN WRITE MODE 28LV010 WRITE MODE AVERAGE CROS S-S ECTION 1.00E-01 1.00E-02 CROSS-SECTION [cm^2] 1.00E-03 SL1 1.00E-04 SL2 SL3 1.00E-05 N4 N5 Memory 1.00E-06 0 10 20 30 40 50 60 70 80 90 LET [Me V-cm^2/mg] EEPROM APPLICATION NOTES This application note describes the programming procedures for the EEPROM modules and with details of various techniques to preserve data protection. Automatic Page Write Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle, and allows the undefined data within 128 bytes to be written corresponding to the undefined address (A0 to A6). Loading the first byte of data, the data load window opens 30 s for the second byte. In the same manner each additional byte of data can be loaded within 30 s. In case CE and WE are kept high for 100s after data input, EEPROM enters erase and write mode automatically and only the input data are written into the EEPROM. WE CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE. Data Polling Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation. 05.28.02 Rev 2 All data sheets are subject to change without notice 14 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM RDY/Busy Signal 28LV011 RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal has high impedance except in write cycle and is lowered to VOL after the first write signal. At the-end of a write cycle, the RDY/Busy signal changes state to high impedance. RES Signal When RES is LOW, the EEPROM cannot be read and programmed. Therefore, data can be protected by keeping RES low when VCC is switched. RES should be high during read and programming because it doesn't provide a latch function. Memory Data Protection To protect the data during operation and power on/off, the EEPROM has the internal functions described below. 1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation. During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20 ns or less in programming mode. Be careful not to allow noise of a width of more than 20 ns on the control pins. 2. Data Protection at VCC on/off 05.28.02 Rev 2 All data sheets are subject to change without notice 15 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM 28LV011 When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during VCC on/off by using a CPU reset signal to RES pin. RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES become low, programming operation doesn't finish correctly in case that RES falls low during programming operation. RES should be kept high for 10 ms after the last data input. Memory 3. Software Data Protection The software data protection function is to prevent unintentional programming caused by noise generated by external circuits. In software data protection mode, 3 bytes of data must be input before write data as follows. These bytes can switch the nonprotection mode to the protection mode. Software data protection mode can be canceled by inputting the following 6 bytes. Then, the EEPROM turns to the non-protection mode and can write data normally. However, when the data is input in the canceling cycle, the data cannot be written. 05.28.02 Rev 2 All data sheets are subject to change without notice 16 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM 28LV011 Memory 32-PIN RAD-PAK(R) FLAT PACKAGE SYMBOL MIN A b c D E E1 E2 E3 e L Q S1 N 0.350 0.020 0.005 0.117 0.015 0.003 -0.404 -0.234 0.030 DIMENSION NOM 0.130 0.017 0.005 0.820 0.410 -0.240 0.085 0.050BSC 0.370 0.035 0.027 32 0.390 0.045 -MAX 0.143 0.022 0.009 0.830 0.416 0.440 --- F32-01 Note: All dimensions in inches 05.28.02 Rev 2 All data sheets are subject to change without notice 17 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM Important Notice: 28LV011 These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies' products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies' liability shall be limited to replacement of defective parts. Memory 05.28.02 Rev 2 All data sheets are subject to change without notice 18 (c)2002 Maxwell Technologies All rights reserved. 3.3V 1 Megabit (128K x 8-Bit) EEPROM Product Ordering Options Model Number 28LV011 28LV011 XX X X -XX Feature Access Time Option Details 20 = 200 ns 25 = 250 ns Screening Flow Monolithic S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55C, +25C, +125C) E = Engineering (testing @ +25C) Memory Package F = Flat Pack Radiation Feature RP = RAD-PAK(R) package RT11 = Guaranteed to 10 krad at die level RT21= Guaranteed to 25 krad at die level RT41 = Guaranteed to 40 krad at die level 1. No Radiation Guarantee for Class E & I Base Product Nomenclature 3.3V 1 Megabit (128K x 8-Bit) EEPROM 05.28.02 Rev 2 All data sheets are subject to change without notice 19 (c)2002 Maxwell Technologies All rights reserved. |
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